Solid-state imaging devices using semiconductors are known as image sensors such as CCD image sensors and CMOS image sensors. The image sensors increase the number of pixels to generate finer images. As a result, reducing a light receiving area per pixel might decrease the sensitivity.
To solve this problem, for example, Patent Document 1 proposes a solid-state imaging device having a gate electrode for avalanche multiplication between a photodiode portion to photoelectrically convert the incident light and a floating diffusion portion to convert an electric charge to a voltage.
The solid-state imaging device described in Patent Document 1 performs avalanche multiplication on an electric charge and stores multiplied electrons. The solid-state imaging device therefore includes multiple quantum well structures and gate electrodes corresponding to the multiplication and the storage. The solid-state imaging device also includes a gate electrode for transfer to move charges between the quantum wells. At least three gate electrodes to multiply electric charges are needed within a unit pixel. This caused the problem of increasing the pixel size and making it difficult to use a large number of pixels. The solid-state imaging device according to this configuration multiplies an electric charge between different quantum wells (different gate electrodes) and therefore increases the length of a path the electric charge travels. This makes it difficult to decrease a voltage applied to a multiplication gate electrode to acquire an electric field that enables the avalanche multiplication.